发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To obtain an IC having a remarkably low wiring resistance, by providing a metal silicide layer on the surface of a poly-Si layer used for electrodes of and wiring for an element and on the surface of an impurity diffusion layer used for electrodes of and wiring for a semiconductor. CONSTITUTION:A p<+> channel stopper 22 and a field dioxide film 23 are provided on a p-type Si substrate 21. A poly-Si gate electrode 25 is laminated on a gate insulating film 24, and n<+> diffusion layers 27, 28 are formed. Metal silicide films 26, 28, 30 are formed on the poly-Si layer 25 and n<+> layers 27, 28, respectively. When Pt or Ni is used for the metal in the metal silicide to form a layer of around 0.1mum on the layers 25, 27, 28, the value of resistance in the poly-Si or n<+> layers can be reduced to a not-less-than-one-digit smaller value. When the layer 25 is formed to a thickness of around 0.2mum, the silicide layer 26 has no influence upon the work function of the poly-Si layer 25. Even when the n<+> layers 27, 28 are as shallow as around 0.5mum, the silicide layer does not break through its junction surface. The silicide layers and metal wiring make sufficiently low ohmic contact without being treated at a high temperature. Thus, an IC which is operated at a high speed owing to a remarkably low wiring resistance can be obtained.
申请公布号 JPS55125648(A) 申请公布日期 1980.09.27
申请号 JP19790033735 申请日期 1979.03.22
申请人 NIPPON ELECTRIC CO 发明人 MORIMOTO MITSUTAKA
分类号 H01L21/768;H01L21/28;H01L29/43 主分类号 H01L21/768
代理机构 代理人
主权项
地址