摘要 |
PURPOSE:To surely exclude the transfer mistake of charge transfer element, by producing the two phase clock pulse in opposite phase relation in which the relation of the cross point is biased to high level or low level. CONSTITUTION:The oscillation output in frequency phi is generated by the pulse oscillation circuit 1, and this output is inverted for the phase with the inverter 2 into phi1. phi1 is further phase-inverted with the inverter 3 into phi1'. The clock pulses phi1, phi1' are inputted to the frequency division circuit 4 where divided into phi2 and phi2' in 1/2 division. phi2 and phi2' are phase-adjusted in the phase adjustment circuit 5 into phi3 and phi3'. These are wave shaped in the wave shape circuit 6 into phi4, phi4' being the input to the buffer circuit 7, and the clock pulses phiA, phiB of opposite phase in which the cross point voltage is biased to either level side high or low can be outputted. |