| 摘要 |
PURPOSE:To enable data change with a simple control, by connecting each accumulator of logical operation circuit (ALU) performing a plurality of byte processings with one common bus and selecting the accumulator at the specific area of micro instruction. CONSTITUTION:ALUs 1, 2 perform the operation of upper rank and lower rank bytes, and the output of them is on the internal data buses (A bus) 3, 4 and outputted to the registers 5 and 6. In the operation of accumulator change, the internal register of ALUs 1 and 2 is selected with the data 14, 15 of the specific area of microprogram, and the content of accumulator of upper and lower byte is picked up at the A buses 3 and 4 and inputted to the registers 5 and 6. At the next micro instruction, the content of the register 5 or 6 selected with the register selection signal 9 is stored in the accumulator of ALU 1 or 2 designated at the register designation section of micro instruction via the bus 7, and the content of other registers 5 and 6 is stored in the accumulator of other ALU with the next micro instruction. |
