| 摘要 |
PURPOSE:To miniaturize a leadless package by forming IC chip wiring bonding pads stepwise in more than two rows and connecting them to back surface soldering pads aligned in more than two rows using both side conducting through holes. CONSTITUTION:Die attachement metallize 4 and wire bonding pads 5, 5'are stepwisely formed on the first, second and third layers 1, 2 and 3 of a package, soldering pads 6, 6' are formed corresponding to the respective bonding pads, and they are conducted via through holes. The fourth layer 9 for sealing cap is formed on the third layer. Wires are stereoscopically arrayed via fine wires 8 between an IC chip 7 and the pads 5, 5', and the pads 6, 6' are effectively wired on the back surface of the layer 1. Accordingly, even if the number of the pads of the IC chip is increased, it can miniaturize the package area. |
