| 摘要 |
PURPOSE:To avoid the occurrence of erroneous operation by providing a shallow p<+>-type layer on the exposed parts of the junction of a p-type gate layer and an n<+>-type cathode layer in a planar thyristor in which the ends of all junctions are exposed to the surface. CONSTITUTION:In a p-type semiconductor substrate 1, which is to become an anode layer, an n-type base layer 2 is formed by diffusion. A p-type gate layer 3 is formed inside this, and further an n<+>-type cathode layer 4 is formed by diffusion in layer 3, and thereby a planar thyristor, with all junctions exposed to the surface, is constructed. In this structure, a shallow p<+>-type region 9 is formed by diffusion on the two exposed end surfaces of the pn-junction formed by layers 3 and 4. Then, the entire surface is covered with an SiO2 film 5, and by opening windows, a cathode 6 and a gate electrode 7 are fitted respectively on layers 4 and 3. On the back of substrate 1 is fitted anode 8. By this, it is possible to set the excessively sensitive gate current sensitivity at a proper value, so that no erroneous operation occures. |
