发明名称 ERROR GENERATING CIRCUIT
摘要 PURPOSE:To obtain an error generating circuit which generates artificially the error which features a high coincidence with the actual error, by using the run distribution based on the Gilbert model to the data to be stored in the memory. CONSTITUTION:The M-series generating circuit 2 which is driven by clock generating circuit 1 gives the artificial random pattern in the form of the address to memory 4 via shift register 3. And the run distribution based on the Gilbert model is memorized in memory 4. The reading output of memory 4 is supplied to comparator 7 after latched at latch circuit 5. For comparator 7, the output of counter 6 counting the clocks is connected to the other input, and ''1'' and ''0'' are delivered when the agreement and no agreement are obtained between the both input respectively. And the data of circuit 5 is taken in by the fall edge, and at the same time counter 6 is reset. Then the output of comparator 7 is utilized as the artificial error output.
申请公布号 JPS55121757(A) 申请公布日期 1980.09.19
申请号 JP19790030214 申请日期 1979.03.14
申请人 MITSUBISHI ELECTRIC CORP 发明人 OONISHI TAKESHI;TANAKA KUNIMARO
分类号 H04L1/00;G06F7/58;H03K3/84;H04L1/24 主分类号 H04L1/00
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