| 摘要 |
<p>A read only memory (ROM) comprising word lines (WLi, WLj, WLk), bit lines (BLI, BLm) virtual ground lines (VGL, VGm) and memory cells (CLi, CLj, CLk) of FETs arranged on intersections of the word lines and bit lines. A gate of each cell is connected to one of the word lines. A drain of each cell is connected to one of the bit lines. A source of each cell is connected to one of the virtual ground lines. According to the invention, particular cells storing information "0" are depletion-type transistors, the threshold voltage of which being lowered by ion implantation. When ROM is in operation with respect to the memory cells on a selected bit line, the potential difference between a selected word line and a selected virtual ground line is enough to turn on the depletion-type cell but not enough to turn on the other cells and, the potential difference between a nonselected word line and selected virtual ground line is not enough to turn on the depletion-type cell.</p> |
