发明名称 Trigger pulse forming circuit
摘要 A trigger pulse forming circuit comprising a first power supply; a second power supply whose voltage is less than that of the first power supply, a differential amplifier including a first transistor whose operating voltage is supplied from the first power supply and a second transistor whose operating voltage is supplied from a second power supply, at least the first transistor being adapted for application thereto of an input pulse signal; a load resistor connected to an output terminal of the first transistor; an integrating circuit connected to an output terminal of the second transistor; and a third transistor whose base and collector are connected respectively to opposite ends of the integrating circuit and its emitter is connected to the output terminal of the first transistor whereby the trigger pulse output is obtained from the output terminal of the first transistor. A diode may preferably also be included, the anode of the diode being connected to the output terminal of the second transistor and the cathode thereof being connected to the second power supply whereby the probability of the trigger pulse output saturating the transistors of the next stage is substantially lessened.
申请公布号 US4223237(A) 申请公布日期 1980.09.16
申请号 US19780967640 申请日期 1978.12.08
申请人 TRIO KABUSHIKI KAISHA 发明人 YAMADA, TSUNEO;MIYAMOTO, YUKIHIKO
分类号 H03K5/02;(IPC1-7):H03K5/08 主分类号 H03K5/02
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