发明名称 REPEATER
摘要 PURPOSE:To make it possible to use both FDMA and TDMA signals for repeating amplification in common and then to make use of that effectively for a satellite repeater, etc., by providing a delay circuit whose delay time agrees with the time when a gain control signal and input signal arrive at a variable gain amplifier. CONSTITUTION:A signal branched 7 partially is level-detected and amplified 11 and then applied to input terminal C of variable gain amplifier 9 as gain control signal Sc. Input signal Sin, on the other hand, is applied to amplifier 9 via delay circuit 8 and delay time (gamma) of circuit 8 is determined so that the time when the gain of amplifier 9 has been controlled will be equalized by signal Sc to when signal Sin reaches amplifier 9. As a result, the gain can be varied according to the input signal level without time delay, so that a constant output can be obtained without reference to the speed of the input signal level. Further, there is the advantage to use it for both FDMA and TSMA signals.
申请公布号 JPS55120232(A) 申请公布日期 1980.09.16
申请号 JP19790027052 申请日期 1979.03.08
申请人 NIPPON ELECTRIC CO 发明人 ISHIHARA HIROYUKI;KITATSUME SUSUMU
分类号 H04B3/36;H04B7/005;H04B7/15;H04B7/204 主分类号 H04B3/36
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