GEINTEGREERDE HALFGELEIDERSCHAKELING VOORZIEN VAN EEN MONOKRISTALLIJN HALFGELEIDERSUBSTRAAT EN EEN UIT DE DAMPFASE DAAROP AANGEBRACHTE HALFGELEIDENDE LAAG, BESTAANDE UIT EEN POLYKRISTALLIJN GEBIED EN UIT TEN MINSTE TWEE MONOKRISTALLIJNE GEBIEDEN.

摘要

1287134 Integrated circuits SONY CORP 30 Oct 1969 [30 Oct 1968 (2)] 53224/69 Heading H1K An integrated circuit arrangement comprises regions of monocrystalline semi-conductor and a high resistivity isolating region of polycrystalline semi-conductor vapour deposited side by side on a monocrystalline substrate the doping concentration of the polycrystalline material lying between 1012 and 1017 atoms/cc. so that its resistivity is substantially greater than that of similarly doped monocrystal. A circuit consisting of two diodes connected in parallel with their cathodes commoned is made by forming a network of seeding sites consisting of silica or silicon nitride on an N + silicon wafer, and depositing appropriately doped silicon to a depth of 8Á to provide monocrystal N regions isolated by a high resistivity polycrystalline network. The diode anodes are formed in the N regions and provided with aluminium electrodes by standard planar techniques and a gold cathode deposited on the back of the wafer. In another embodiment using a P-type starting wafer diffused N+ inclusions are provided in apertures in the seeding network prior to deposition of the N-type material, and base, emitter, and collector contact regions formed subsequently in the monocrystal islands by diffusion. In a modification of this silicon is used as seeding material. The remaining embodiments are essentially as described in Specification 1,251,348. Reference has been directed by the Comptroller to Specification 1,251,348.