发明名称 ZERO ADJUSTER
摘要 PURPOSE:To enable zero adjustment in a short time and attain a prescribed accuracy of zero adjustment, by adding a state detector to change the frequency of a clock signal depending on the state of the zero adjustment. CONSTITUTION:One input terminal e- of a servo unit 2 is connected to a zero point and the other terminal e+ is connected to the output Eo of an amplification circuit 1. The inputs to a comparator 21 have a relationship with each other as e+>e- when the output Eo deviates toward the positive side during zero adjustment in which clock pulses C are applied to a counter 23 by an oscillation control input A. At that time, the output Ea of a D/A converter 24 increases but the output Eo decreases toward zero and finally repeats small oscillation near zero. An input detector 25 detects that the input e+ approaches zero or passes it. The detector controls a pulse generator 22' to reduce the frequency of the clock pulses C to a degree to attain enough accuracy. Thus, the output Eo approaches zero in a short time when the frequency of the pulses C is high. After that, the frequency of the pulses C becomes low. As a result, zero adjustment of enough accuracy can be effected.
申请公布号 JPS55119011(A) 申请公布日期 1980.09.12
申请号 JP19790026788 申请日期 1979.03.09
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 IMAI HIROMI
分类号 G01D3/028;G01D3/02;G01D7/00 主分类号 G01D3/028
代理机构 代理人
主权项
地址