| 摘要 |
PURPOSE:To interrupt useless current flowing to the circuit during signal processing and to reduce the amount of power consumption, by providing the detection section including C/MOS circuit detecting the output from the logic circuit. CONSTITUTION:The pre-charge P channel MOSFETMp' controlled with the clock signal phi10 and the N channel MOSFETM1'-M128' for logic inputting many input logic signals A1'-A128' to the gate are connected serially, and the output Out10 is connected to the gate of C/MOS circuit consisting of P.MOSFETMsp' connecting the source to the power supply and N.MOSFETMSN1' connected in series with it. N-MOSFETMSN2' controlled with the clock signal phi20 is connected in series with the source of the C/MOS circuit, FETMSN1'. When the output Out10 is at a potential level not more than the threshold voltage of N.MOSFET and when the clock signal phi20 is at H level, the output can be detected without flowing through-current. |
