| 摘要 |
PURPOSE:To realize the adaptive step size by varying the number of the high-speed integrating pulses in accordance with the quantized step size and via the digital circuit, thus omitting the circuit requiring the complicated accuracy and then facilitating the LSI formation. CONSTITUTION:Adaptive delta modulation code 108 is delivered from sampling/ quantizing circuit 107 in response to the rise of sampling clock pulse 114 applied to terminal 106. Then code 108 is applied to step size deciding circuit 109, and thus the step size is decided based on the past code series to deliver signal 110. Signal 110 is then applied to pulse number control circuit 201 of integrated pulse generator circuit 211, and high-speed integrated pulse number control signal 202 is delivered to the output. At the same time, high-speed clock pulse 204 is applied to terminal 203, and the logic sum is secured through AND gate 205 to signal 202. Then clock signal 206 is applied to gates 207 and 208 along with code 108, and high-speed integrated pulses 209 and 210 are delivered to the output and then applied to integrating circuit 113. Thus the fixed amount of charge and discharge is carried out in response to pulses 209 and 210. |
