发明名称 MULTIPLE ACCESS UNIT FOR EXTERNAL MEMORY UNIT
摘要 PURPOSE:To make it possible to back up a system on occurrence of a fault of a controller by eliminating the latency time of controllers, by connecting drivers to the controllers. CONSTITUTION:When access from CPU1-2 to driver 3-1-2 should be attained while CPU1-1 is in process of access to driver 3-1-1 via input port 11-1 and output port 01-1 of controller 2-1 and connection cable C5, CPU1-2 attains access to driver 31-2 via input port 12-1 and output port 02-1 of controller 2-2 and connection cable C12 after making sure that while controller 2-1 is exclusively used by CPU1-1, controller 2-2 is standing by. Similarly, access to the same driver is attained via a different controller when CPU judges that either controller 2-1 or 2-2 is in trouble.
申请公布号 JPS55116156(A) 申请公布日期 1980.09.06
申请号 JP19790023374 申请日期 1979.03.02
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 HIROTA YOSHIO
分类号 G06F13/14;G06F3/00;G06F3/06;G06F15/16;G06F15/17 主分类号 G06F13/14
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