发明名称 MOS TYPE MEMORY
摘要 PURPOSE:To obtain a memory with high speed and high integration by using a FET, in which the depletion layers that extend from the source and drain to the substrate respectively are in contact with each other, and by detecting the storage state of the majority carrier under the gate by means of current between the source and the drain. CONSTITUTION:For writing the information, when the gate 107 is made negative potential from zero by a pulse and negative voltage is applied to the source 103 and drain 104 by a pulse, the depletion layer is separated from the part under the gate, the positive holes are stored in the part 109. When writing no information, both the source and drain or either of them is made zero volts to change the gate potential. At this time, the depletion layers are connected to each other under the gate and no charge is stored. For holding the information, the gate is made negative and the source and drain are made zero volts, and for reading the data, when the gate is made zero volts and positive potential is applied to the drain to detect current, the current is less while the positive hole is present, the data can easily be read since the difference between current values corresponding to the presence and absence of positive holes is greater, the integration can be improved since a large current can be taken out and no capacity for storage is required although the FET is small-sized.
申请公布号 JPS55115355(A) 申请公布日期 1980.09.05
申请号 JP19790022695 申请日期 1979.02.28
申请人 NIPPON ELECTRIC CO 发明人 OOTA TOSHIYUKI;HAMANO KUNIYUKI
分类号 G11C11/35;H01L21/8242;H01L27/108;H01L29/78 主分类号 G11C11/35
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