发明名称 CORRECTABLE DELAY UNIT
摘要 <p>PURPOSE:To make it possible to take an accurate measurement of a delay value in a short time and then to correct it to an accurate delay value by placing a delay circuit, which can vary the delay value by an external control signal, in an oscillation state by feeding its output back to its input side. CONSTITUTION:Delay part 11 consists of AND gates 17 and 18, OR gate 22, and delay circuit 23. The delay value of delay circuit 23 can be controlled by a control signal and circuit 27 is constituted which feeds its output back to its input side. Namely, the output of OR gate 22 is supplied to terminal 28 and further to monostable multivibrator 29, whose output is supplied to OR gate 31. When a start pulse is supplied to terminal 33 with switch 32 placed at the OR gate 31 side, the output of OR gate 31 passes through gate 17 or 18 and 22 to drive monostable multivibrator 29, whose output is inputted to delay part 11 by way of gate 31.</p>
申请公布号 JPS55114018(A) 申请公布日期 1980.09.03
申请号 JP19790021045 申请日期 1979.02.23
申请人 NIPPON TELEGRAPH & TELEPHONE;TAKEDA RIKEN IND CO LTD 发明人 ICHINOMIYA YOSHICHIKA;SUDOU TSUNETAKA;YOSHIDA KENJI
分类号 H03H7/30;H03H11/26;H03K5/13 主分类号 H03H7/30
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