Test circuitry for module interconnection network

摘要

This specification deals with testing of a network of electrical interconnections between chips mounted on an insulative substrate of a module and between the chips and the input and output pins of the module. Each of the mounted chips contains masking circuits which can be activated to prevent controlling signals from the outputs of logic circuits on the chip from being transmitted off the chip and into the interconnection network. Also each of the chips contains emitter follower circuits that logically connect all the chip input terminals to a common output terminal of the chip. In testing the mask circuits are activated. Then potential levels are selectively applied to a plurality of test points in the interconnection network and differences in potential level between these test points and/or between the points and one or more of the common terminals are determined.