发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To miniaturize a MISFET by a method wherein the threshold voltage in the channel region near the source region and the drain region are kept to be higher than that of the region near the center. CONSTITUTION:A p-type Si layer 22 is made to grow up on a monocrystalline insulating substrate 21, and an n<+>-type source region 25 and a drain region 26 are formed in it by diffusion. Its overall surface is covered with an SiO2 film 23', a part of which is made to be a gate insulating film afterward, and setting a mask 27 on the channel region laid between the regions 25 and 26, the boron ion is implanted into the overall surface. A region 222 and 233 which have the high threshold voltage are formed near by the regions 25 and 26 respectively, and their threshold voltage become higher than that of the region 221 formed between the domain 222 and 223. Then the film 23' is removed leaving behind a gate insulating film 23, and a gate electrode 24 is adhered on it. With this construction and the layer 22 being kept in floating condition, the charge is able to be accumulated in the layer 22 without returning back to the regions 25 and 26 when the charge pumping is performed although the channel length is short cut.
申请公布号 JPS55113359(A) 申请公布日期 1980.09.01
申请号 JP19790020094 申请日期 1979.02.22
申请人 FUJITSU LTD 发明人 SASAKI NOBUO
分类号 G11C11/412;G11C11/35;H01L21/822;H01L21/8242;H01L21/8246;H01L21/86;H01L27/04;H01L27/108;H01L27/112;H01L27/12;H01L29/10;H01L29/78;H01L29/786;H01L29/788 主分类号 G11C11/412
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