| 摘要 |
<p>PURPOSE:To enable high speed test for the internal circuit efficiently, by providing the test state flip flop which can set and reset to the internal with instruction. CONSTITUTION:When the test state flip flop 18 is set, with the input signals I0, I1 of TEST.SET instruction inputted, and with TEST.SET instruction fed to the control circuit 17 with the control of the selection signal CS, and when the START instruction is inputted, after each counter is once reset, the count of 1kHz clock is simultaneously started. Accordingly, each counter can be inspected in a short time. Further, when TEST.RESET instruction is inputted, the flip flop 18 is reset and the output of the counter at the prestage is inputted to each counter. Accordingly, each counter can accurately measure the time.</p> |
