| 摘要 |
PURPOSE:To obtain a simple-structure counter circuit which can increase the division ratio by switching the output signals between the circuit which gives the delay of the integer bit to the signal delivered when the counting means features the specified value and the circuit which gives the delay of the decimal bit. CONSTITUTION:In case the division value delivered is an integer, switch signal JO features the L level, and the outut signal of 1-bit shift register 3 is delivered from output 05 of switch circuit 5. Then preset value N is set to down-counter 1 to repeat the counting, and the output signal of circuit 5 turns to 1/N' of input frequency fin. Then in case signal JO features the H level, the output signal sent from register 3 is supplied to half-bit shift register 4. And this output signal is delivered from output 05 of circuit 5 in the form of division value N+0.5 which is given from down-counter 1, and also supplied to phase control circuit 6 to give inversion to output signal CKO. |
