| 摘要 |
PURPOSE:To secure detection for the presence or absence of the pulse signal in the digital communication system via the two flip-flops which are connected vertically. CONSTITUTION:When input pulse signal (a) of bit cycle t is applied to clock terminal C of FF1, FF1 is set. And clear signal (c) is applied with inversion to clear terminal R after the lapse of propagation delay time tpd, and then FF1 is reset by the fall of signal (d). As signal (c) is applied to the clock terminal of FF2, FF2 is reset by the rise of signal (c) as long as FF1 is set. Accordingly, output signal (e) of FF2 becomes ''O'' while signal (a) continues, but signal (e) turns to ''1'' if signal (a) discontinues. Thus the arrival of the input pulse signal can be detected assuredly within the double range of period T. |
