| 摘要 |
<p>PURPOSE:To enable to measure the jitter, by obtaining the clock frequency being the reference with operation, if the reference clock of digital signal is absent. CONSTITUTION:The signal from measured digital signal input terminal 11 is fed to the gate 12 and FF13, FF13 is operated with the output of FF15 inputting the signal at the start signal input terminal 14, and the gates 12, 16, 17 are opened with the leading of signal. The pulses of high and low level of signal are fed to the counters 21, 22 via the gates 16 and 17 for pulse count, the count value is latched every trailing of signal fed to the latch circuits 23, 24, the addition circuit 26 is driven at the output change point of FF25 to add the output of the circuits 23 and 24, and the output is fed to the memory 28. Further, the signal is fed to the measuring time determination counter 29, the output of the counter 29 is fed to FF13, 15 and the data processor 31 to measure the length from the first edge of signal leading and trailing to the edge sequentially corresponded, and jitter of each edge measured is operated.</p> |
