| 摘要 |
PURPOSE:To realize the high-speed operation by memorizing the product into the ROM for the filter coefficient value of the digital filter and the all value which can be obtained with the data led out of the delay block. CONSTITUTION:The product of the data with the bit length set to L and filter coefficient value hj is memorized in addresses a0-aL-1. In this case,the ROM region of the 2L words is allotted to each hj, and thus the capacity of the NX2L words is necessary in case the filter order number is N. The input signal of line 11 is supplied in series to shift register 13 via serial-parallel converter 12. And each stage of the N steps holds data xn... of L bit, and multiplexer 14 extracts the data of each stasge in sequence to hold them at register 16. And the data gives the address to the region corresponding to ROM17. Thus the specific region corresponding to each coefficient is selected, and the value corresponding to the multiplication result is held at register 18 to be then added the result held at register 19 via adder 21. The added value is then delivered to register 20. |
