摘要 |
PURPOSE:To increase the using allowance range for the AND array by using the transistor circuit containing the constant current source to be connected to the emitter coupling for the means which transmits the output signal of the decoder circuit to the AND array. CONSTITUTION:When output level Zn and Zn' of the decoder become to the high levels along with points a-f reaching the higher potential than reference voltage VRR, corresponding transistors Q1-Qn are turned on. And furthermore corresponding bit lines of 1-n turn to the low levels respectively. The low-level potential of the bit line then is identical to potential Vn-VDn+VF which is clamped by Di, where Vn is the constant voltage due to the constant current gate of the decoder, and VF is the forward bias voltage of the diode in the array each. The clamping effect of diode Di prevents the current flowing through transistor Qn from becoming excessive and thus keeps the bit line at the normal level. In addition, the array current is increased by the clamping effect, thus increasing the speed. |