发明名称 MULTIPLE COMMON BUSSES IN DATA PROCESSING SYSTEM
摘要 Multiple common buses are provided for coupling a plurality of units in a data processing system for the transfer of information therebetween. The central processing unit (CPU) allocates the multiple common buses to one of the units in response to bus requests received from various units desiring to use the common buses. Bus requests are generated in a synchronous manner by use of a timing signal originating in the CPU which is connected in series between the one or more units on each of the multiple common buses.
申请公布号 AU5504280(A) 申请公布日期 1980.08.07
申请号 AU19800055042 申请日期 1980.01.30
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 JOHN J. BRADLEY;MING T. MIU;JIAN-KUO SHEN
分类号 G06F13/36;G06F13/362 主分类号 G06F13/36
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