发明名称 FABRICATING METHOD OF COMPOSITE TRANSISTOR
摘要 PURPOSE:To accurately fabricate a temperature compensated resistor for a monolithic Darlington transistor by employing an ion implantation process which enables the treatment at low temperature without lateral diffusion and further readily controls ion distribution. CONSTITUTION:An n-type layer 2 is grown on an n<+>-type silicon substrate 1, and used for a collector region. Then, a p-type base region 3 is diffused in the layer 2. Then, two n-type emitter regions 4a, 4b are formed in the region 3. P or As ion is implanted on the surface of the layer 2 between the regions 4a and 4b and on the surface contacting the region 4a with the regions 4a, 4b as contact regions. Thus, n<+>-type surface resistance regions 5a, 5b of approx. 100OMEGA/square are formed on the surfaces of the layer 2 and the region 4a. Then, an SiO2 film is coated on the entire surface of the substrate 1. Openings are perforated on the film and a base electrode B, a metallic electrode F, and an emitter electrode E are coated on the film. A collector electrode C is mounted on the back surface of the substrate 1. Thus, there can be obtained a precise temperature compensated resistor adapted for mass production.
申请公布号 JPS55102265(A) 申请公布日期 1980.08.05
申请号 JP19790009377 申请日期 1979.01.30
申请人 SHINDENGEN ELECTRIC MFG 发明人 KAWAGUCHI AKIMITSU
分类号 H01L21/8222;H01L21/331;H01L27/08;H01L27/082;H01L29/08;H01L29/72;H01L29/73 主分类号 H01L21/8222
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