发明名称 DETECTION CIRCUIT FOR OUT OF SYNCHRONISM
摘要 PURPOSE:To ensure to detect out of synchronism, by providing the delay circuit having the delay time actually equal to the fine operation delay time of monostable multivibrator and enabling to set the pulse of monostable multivibrator freely. CONSTITUTION:The phase comparison circuit 1 compares the reference signal from the input terminal 1a with the controlled signal from the input terminal 1b and output is given from the two output terminals in case of delay or advance of phase, or high and low frequency. Logical sum 4 is taken for the outputs and the result is fed to the monostable multivibrator MM1 and fed to the delay circuit 11 consisting of the inverters 8-10 to cancel the delay time of the monostable multivibrator MM1. Next, the gate circuit 12 takes the logical product of the output of the monostable multivibrator MM1 and the circuit 11 to operate the monostable multivibrator MM2 in which the operation time is set more than the period of the reference signal based on the output of the circuit 12, and this output stops the output of the phase locked loop circuit. Thus, the out of synchronism can surely be detected.
申请公布号 JPS5599839(A) 申请公布日期 1980.07.30
申请号 JP19790006735 申请日期 1979.01.23
申请人 FURUNO ELECTRIC CO 发明人 YAMAMOTO TETSUO
分类号 H03L7/095;H03L7/06 主分类号 H03L7/095
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