发明名称 DIVISION PROCESSING SYSTEM
摘要 PURPOSE:To make it possible to determine any strict error within a fixed range by finding value R0 approximate to the reciprocal number of divisor D for a division process between dividend N and divisor D. CONSTITUTION:Approximate value R0 of the reciprocal of divisor D is found and approximate value R1 of the reciprocal of the product of divisor D and approximate value R0 is also found; and approximate value Ri+1 of the reciprocal of the product of D and approximate values R0-Ri is similarly obtained. Then, approximate values R0-Rn obtained in the above-mentioned way are processed according to (formula-A) and after the process is repeated fixed times until fixed error precision is obtained, expedient quotient Qn is obtained. Next, quotient Qn is rounded and under the condition the obtained remainder satisfies, corrections are made. This arithmetic is attained by a unit composed of normalization circuit parts 1 and 7, size-comparison and fine-adjustment processing part 2, R0 index table, multiplier 4, digit-matching processing part 5, adder 6, buffer or bus 8, and registers 9-16.
申请公布号 JPS5592945(A) 申请公布日期 1980.07.14
申请号 JP19780162407 申请日期 1978.12.29
申请人 FUJITSU LTD 发明人 KAWAI SATORU;OKAMOTO TETSUO
分类号 G06F7/52;G06F7/483;G06F7/533;G06F7/535 主分类号 G06F7/52
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