发明名称 FRAME STEP OUT PREVENTION SYSTEM
摘要 PURPOSE:To prevent frame step out by delaying one output of two-system transmission circuits and rearranging their outputs according to a fixed rule and transmitting them and by delaying the output of the other circuit similarly to transmission and rearranging them reversely to transmission in the receiving side. CONSTITUTION:The output of transmission-side carrier-frequency terminal equipment 11 is subjected to bipolar/unipolar conversion and series-parallel conversion in bipolar/unipolar converter 12 to generate two-system PCM pulse trains PCM1 and PCM2. One pulse train PCM2 is delayed by proper number n of bits in a delay circuit to generate pulse train PCM2'. After that, two-system signals are rearranged according to a fixed rule in 14-1 and 14-2 and are transmitted. Meanwhile, in the receiving side, two-system signals are rearranged reversely to the transmission side by 21-1 and 21-2 after the other pulse train is delayed by the same delay quantity as the transmission side in 22. As a result, error bits in the demodulation signal can be dispersed to prevent frame step out.
申请公布号 JPS5592058(A) 申请公布日期 1980.07.12
申请号 JP19780165122 申请日期 1978.12.29
申请人 FUJITSU LTD 发明人 SHIMOYAMA TSUNAYOSHI;MORITA TOSHIYUKI;TAKANO TOSHIHARU
分类号 H04J3/06;H04L7/00;H04L7/08;H04L27/18 主分类号 H04J3/06
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