| 摘要 |
PURPOSE:To provide a small-area non-volatile memory by providing n<+>-type layers for surrounding n-type source and drain layers, a floating gate insulated from the source and drain layers, and a second gate formed on the floating gate using a p- type silicon substrate. CONSTITUTION:A p<+>-type layers 32, 33, n-type source and drain regions 34, 35 are formed in a p-type silicon substrate 31, and a floating gate 37 is formed through an insulating film 36, and a second gate 38 is further formed through the insulating film on the substrate. Since the source and drain regions are surrounded by the p<+>- type layers according to this configuration, this configuration can completely prevent a punch-through phenomenon. An effective channel length becomes sum of the layers 32, 33, which is shorter than the conventional length. In addition, this short channel effect can reduce the threshold voltage Vth and increase the operating margin. Thus, there can be obtained a high performance and high integration non- volatile memory. |
