发明名称 VECTOR BRANCH LOGIC UNIT
摘要 In a microprogrammed data processing system the throughput of the system is increased during the processing of decimal numeric instructions by apparatus which indicates to the microprogram the characteristics of the operand being processed. This enables the proper microprogram subroutine; that is, if the operand is a floating point or a scaled number, has 4-bit decimal digits or 9-bit decimal digits, has an overpunched leading sign or trailing sign, has an adjusted length less than or equal to 63 decimal digits, whether the operand is a long or short operand, and whether the resulting operand is equal to zero or has an overflow.
申请公布号 AU5394879(A) 申请公布日期 1980.07.10
申请号 AU19790053948 申请日期 1979.12.18
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 RICHARD T. FLYNN;JERRY L. KINDELL
分类号 G06F9/22;G06F7/48;G06F7/491 主分类号 G06F9/22
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