发明名称 FAULT DETECTION SYSTEM
摘要 PURPOSE:To secure the detection for the fault via the fixed order showing the idle area by storing previously the above mentioned fixed order into the idle area within the control memory which stores the microprogram and at the time when the idle area is given the access. CONSTITUTION:Sequencer 12 gives the sequential access to the addresses of control memory 10 and then reads out the contents to order register 13. In case the access is given mistakenly for some reason to idle area 10a in memory 10, the order showing that the fixed bit position within area 10a is 1 is read to register 13. Address generator 14 decodes the order and then applies the head address of the fault process program to sequencer 12. Generator 14 can also inform the fault to fault processing mechansim in place of the above mentioned action.
申请公布号 JPS5591034(A) 申请公布日期 1980.07.10
申请号 JP19780162300 申请日期 1978.12.29
申请人 FUJITSU LTD 发明人 HIROYA RIYUUSHI;GOUUKON KAZUHIKO
分类号 G06F9/22;G06F11/00 主分类号 G06F9/22
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