FIELD EFFECT TRANSISTOR WITH A SHORT CHANNEL LENGTH

摘要

A field effect transistor with a MIS gate arrangement having a source and drain formed in a semiconductor body and including an electrically conductive region additionally provided which lies beneath the source zone and which has a conductivity opposite to and/or electrical conductivity which is higher than the semiconductor body which surrounds the zone and in which in the controllable field effect gate the electrically conductive zone is spaced a distance from the gate and the boundary surface and wherein the gate insulation layer projects laterally a space relative to the source zone which is approximately 1 to 10 times the thickness of the gate insulation layer and the distance from the gate arrangement to the boundary surface is 1 to 5 times the thickness.