| 摘要 |
PURPOSE:To enable low power consumption while assuring memory, by applying repetitive pulse signal to the power supply of FF circuit within the period sufficient for the hold of memory information of FF circuit. CONSTITUTION:The pulse signal generating circuit 5 supplying power supply to the memory cell consists of the ring oscillation circuit consisting of inverter circuits IN1-IN3, inverter circuits Q21, R9 taking the load of resistor R9 the same as the resistor constituting the memory cell, and inverted push pull output circuit consisting of the inverter circuit IN4 and push pul MISFET Q22, Q23. In this circuit, the leading of the output B of the inverter circuits Q21, R0 in response to the dispersion of the value of the resistor R9 is changed, and when the resistance value increases, the leading time of signal B is longer and the pulse width of the output C is greater. Accordingly, the flash operation period of memory cell is longer as to the increase in the resistance value and power consumption can be minimized while assuring the memory storage operation. |
