发明名称 BONDING METHOD
摘要 PURPOSE:To enable bonding of wire with less cavity allowance in a bonding method by wire bonding an insulating substrate disposed on substantially the same plane between the surface of a semiconductor device and the surface of external lead conductors. CONSTITUTION:A predetermined portion 16 fixed with semiconductor device 11 on the main surface of a ceramic substrate 10 is so projected that the surface of the semiconductor device 11 and the surface of external lead conductors 15 are disposed on the same plane when the conductors 15 of metal lead are formed via a glass layer 12 on the substrate 10. Then, the conductors 15 are formed on the layer 12, the electrode on the device 11 is wire bonded to the conductors 15 by positive going bonding using normal bonding tool 13. Thus, the bonding with less cavity allowance is conducted between the electrode on the device 11 and the concudtors without special tool.
申请公布号 JPS5585036(A) 申请公布日期 1980.06.26
申请号 JP19780157441 申请日期 1978.12.22
申请人 HITACHI LTD 发明人 OSHINO TOSHIKAZU
分类号 H01L21/60 主分类号 H01L21/60
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