| 摘要 |
PURPOSE:To prevent the fault caused by the malfunction of the microcomputer by securing the non-operation state automatically for both ROM and RAM as well as the generation of the prescribed order code in case the unused address is designated under operation of the unit with which the processing capacity of CPU covers even the unused address region. CONSTITUTION:With malfunction of the microcomputer, the high level is secured for address lines A13-A15 which are never used originally for the control of the operation of the unit along with the output of the high-level signal to OR gate O1. This signal makes ROM inactive as well as RAM. And the signal is set to the low level via inverter I2 to be applied to OR gate O2. When the output of gate O2 is at the low level, gates T0-T7 of the tristate send the order code set by SW0-SW7 to the data bus. At CPU the jumping is given to the address containing the process routine of the abnormal addressing with reception of the order code. |
