| 摘要 |
PURPOSE:To make it possible to detect a synchronizing signal easily and also to simplify a reception process at a reception side, by transmitting pairs of words by adding bits of a synchronizing signal, constituted so that bits will be inverted at every transmitted word, to respective pairs of sent words. CONSTITUTION:Words W1...W3 consist of 010, 101 and 010 and synchronizing signal S and words W1...W3 are inputted, bit by bit, to parallel-series converter circuit 1 in parallel and outputted, bit by bit, to line 1a in series. Consequently, one bit of synchronizing signal S, constituted so that bits will be inverted at every transmitted word, is added to each pair of sent words and sent out. Therefore, the synchronizing signal can easily be detected and a reception process at a reception side can also be simplified. |
