发明名称 INPUT STACK FAULT DETECTION SYSTEM OF DECODER
摘要 PURPOSE:To improve reliability by providing two decoders, which expand m-num ber input bits to n-number outputs, in multiple connection in the input side and connecting commonly outputs of these decoders to a check circuit and detecting a fault in an on-line mode immediately after the fault is generated. CONSTITUTION:M-number binary code signals are inputted, and they are expanded to n/2 selectively by decoder DEC1 in cast that the number of 0-level inputs is odd, and they are expanded to n/2 selectively by decoder DEC2 in case that the number of 0-level inputs is even. Logical outputs are outputted to terminal OUT-OUT7 of respective output end of decoders DEC1 and DEC2 and are inputted commonly to 1/8CHK for parity check. Then, a fault is detected in the on-line mode immediately 1/8 check circuit after the fault is generated, thereby improving the reliability of output signals.
申请公布号 JPS5582360(A) 申请公布日期 1980.06.21
申请号 JP19780141756 申请日期 1978.11.17
申请人 FUJITSU LTD 发明人 NARA TAKASHI;MIYAKE HIROSHI;TOKUNAGA YUUJI
分类号 G06F11/00;G06F5/00 主分类号 G06F11/00
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