| 发明名称 |
SIGNAL PROCESSING SYSTEM FOR CHARGE TRANSFER ELEMENT |
| 摘要 |
PURPOSE:To reproduce only the useful signal by making a sample hold by a reset period of transfer pulse over the period of useless output. CONSTITUTION:A clock pulse B in synchronism with an image signal A is delivered to a terminal 501 and clock pulses C and D of time lags t1<t2 are formed by means of a delay circuit 5A. A pulse E for detecting the necessary and unnecessary periods is delivered to the terminal 502. Each pulse is applied to a circuit 5D constituted by an inverter and AND and OR gates to form sampling clock pulse H. The useful period of this pulse H is detected from the position of time axis of the AC signal wave form, while useless period is extracted as the reset period. In consequence, signals of wave forms A-H are obtained at points 52-58 in the output 51 and internal circuit 5D of the sample hold circuit 5c. It is thus possible to reproduce only the useful signal without causing distortion of the output signal, while interrupting useless signal. |
| 申请公布号 |
JPS5580372(A) |
申请公布日期 |
1980.06.17 |
| 申请号 |
JP19780153048 |
申请日期 |
1978.12.13 |
| 申请人 |
TOKYO SHIBAURA ELECTRIC CO |
发明人 |
IWAZAWA MINEO;YAMAMOTO HIROYUKI;SAITOU TETSUO |
| 分类号 |
H01L21/339;H01L27/148;H01L29/762;H04N5/335;H04N5/341;H04N5/357;H04N5/372;H04N5/378 |
主分类号 |
H01L21/339 |
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