| 摘要 |
PURPOSE:To reduce the number of parts and power consumption by connecting one current detecting resistance to a plurality of magnets in common and controlling the input applied on the comparator in response to the number of the simultaneously driven magnets. CONSTITUTION:When driving pulses are applied on two input terminals A1 and A2, for example, these two driving pulses are added by a circuit 1 and thus obtained output voltage is applied on one input terminal of a comparator 3. At this time, there is no current passing through magnets M1-Mn, so the comparator 3 outputs logic ''1'' and outputs of NAND circuits G1 and G2 turn to logic ''0''. As a result, transistors T1 and T2 become ON and the magnet M1 and M2 driven. Total current IM passing through these driven magnets is applied on the other input terminal of the comparator. Both inputs on the comparator are compared to each other and the gates are controlled by the output obtained from the above comparison. |
