| 摘要 |
PURPOSE:To reduce the area of an element by overlapping the gate regions of an n-channel MOS transistor Tr and a p-channel junction FET so as to form one body, in a structure of a CMOS transistor circuit whose integration density is high. CONSTITUTION:A p-type silicon layer 11 is formed on an n-type silicon substrate 10, n<+>-diffused layers 21 and 22 are formed on the layer 11, and a V-shaped groove whose sides are 31 and 32 is formed so that the thickness of a portion 12 is d0. Then, oxide films 40 and 41 are formed with thick and thin thicknesses, and contact holes 51, 52, and 53 are provided. Thereafter, an aluminium conductive film is formed on all over the surface, and a conductive films 61, 62, and 63 are left over. |
