| 摘要 |
PURPOSE:To make address designation speedy by returning the next address to the initial value when the fixed numerical value which is set in the memory has been matched with the address numerical value of the final number of sample value of one cycle of a since wave. CONSTITUTION:In the memory 21 are stored one cycle of a sine wave of the fixed frequency f1 and the sample level of the number of samples S. Whenever the memory 21 is addressed through the shift register 25, the ratio r of the necessary generation signal frequency f2 to the frequency f1 is read out, and the contents of the register 25 are added by ''r'' through the adder 24 and the switch 26. When this address An becomes An>=(S-r) to the numerical value S-r which is stored in the memory 28, the contents of the addition circuit 27 becomes An-(S-r)=O, and the address by the register 25 is returned easily to the initial value within the sample time without a lot of memories, etc., by an output of the circuit 27 which passed the changeable switch 26 through the discrimination circuit 32. |
