发明名称 Data processing system having an integrated stack and register machine architecture.
摘要 <p>A data processing system including three resources, i.e., a memory (1), a general purpose register file (5) having a plurality of elements (Ro - R7) and a stack (7) having a top (TOS) thereof. The system includes a first means for making the top of the stack (TOS) correspond to at least one of the elements (R0-R7) in the general purpose registerfile (5) and a second means for controlling the operation of the stack (7). When the element (R0 - R7) to which the top of the stack (TOS) is made to correspond is specified in an instruction register (11) of the system, the top of the stack (TOS) is selected to be accessed by the first means and the operation of the stack (7) is controlled by the second means.</p>
申请公布号 EP0011442(A1) 申请公布日期 1980.05.28
申请号 EP19790302501 申请日期 1979.11.08
申请人 PANAFACOM LIMITED;HIGH LEVEL MACHINE CORPORATION 发明人 SHIBASAKI, YOSHIHISA;SAKAMURA, KEN;SAKAMAE, WAICHI;NAKANO, KOICHI;AISO, HIDEO
分类号 G06F9/30;G06F9/318;G06F9/34;G06F9/44;(IPC1-7):06F9/34 主分类号 G06F9/30
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