发明名称 Process for fabrication of semiconductors utilizing selectively etchable diffusion sources in combination with melt-flow techniques
摘要 A process for fabrication of semiconductor devices comprising the steps of depositing over the surface of a semiconductor wafer a first insulating layer containing impurities which are to be diffused into the wafer so as to form source and drain regions, depositing a second insulating and melt-flow layer which is softened or melted at low temperatures, opening contact windows, forming a third insulating layer which also contains impurities to be diffused into the wafer so as to form source drain regions, subjecting the wafer to a heat treatment so as to cause melt-flow and form source and drain regions by the diffusion and removing the third insulating layer. LSI circuits with a high source-drain breakdown voltage may be fabricated at high yields.
申请公布号 US4204894(A) 申请公布日期 1980.05.27
申请号 US19790035236 申请日期 1979.05.02
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO LTD 发明人 KOMEDA, TADAO;OGAWA, KAZUFUMI
分类号 H01L29/78;H01L21/033;H01L21/225;H01L21/316;H01L21/336;H01L21/768;H01L27/146;H01L29/06;H01L29/08;(IPC1-7):H01L21/22;H01L21/31 主分类号 H01L29/78
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