| 摘要 |
<p>DIGITAL FILTER CIRCUIT In the prior art, limit cycle noise is reduced in a second order recursive digital filter by a circuit which randomly inhibits the rounding signal in one of the digital multipliers disposed in the filter. In the present disclosure, random inhibiting is constrained to instances in which limit cycle noise is reduced, by monitoring, with suitable logic circuitry, the signals present in the various feedback loops of the filter. Generally, it has been found that the inhibiting circuit should be allowed to operate only if D1 and D2 satisfy predetermined magnitude and polarity relationships, where D1? a version of the filter output signal Y(n) that is removed in time by one sample interval, and D2 ? a version of the filter output signal Y(n) that is removed in time by two sample intervals. The result is the avoidance of larger transients.</p> |
