MULTIPLE-BAND DIGITAL FREQUENCY SYNTHESIZER RECEIVER

摘要

A frequency synthesized multi-band receiver having a phase locked loop (PLL) including a voltage controlled oscillator(VCO) for producing the local oscillator frequency. The PLL includes a programmable divider for dividing the output of the VCO for comparison with a reference frequency in a phase detector to produce a voltage for controlling the output frequency of the VCO. A memory is provided for storing information concerning the upper and lower frequency limits of the bands over which the receiver is to operate.