Coded signal converter for binary to ternary conversion - uses divided clock pulses with same frequency as input signal

摘要

The signal converter converts a binary coded signal into a ternary coded digital signal. A clock oscillation is employed which is asynchronous to the binary coded signal and which has a frequency which is a whole multiple of the bit rate frequency of the latter. This clock oscillation is supplied to a frequency divider (Z) for obtaining a second clock oscillation with the same frequency as the latter bit rate frequency. The output of the frequency divider (Z) and the binary signal are supplied to the inputs of a binary/pseudo ternary eg. a dual Schmitt trigger, converter (W), to allow conversion when the binary coded signal has the bit value (1) and to stop conversion when it has the bit value '0'. The bits with the logic value '1' are converted into a group of alternating pulses under control of the frequency divider output.