发明名称 ALIGNING METHOD FOR EXPOSING SEMICONDUCTOR
摘要 <p>PURPOSE:To prevent decrease in accuracy due to application irregularities and the like, by detecting the interference pattern of reflected light from a wafer and an aligning, pattern on a reticle with an optical system, and relatively aligning the reticle and the wafer by the obtained aligning quantity from the central position. CONSTITUTION:An image from a two-dimensional solid-state image sensing device 47 undergoes optoelectronic transducing action and an interference pattern 79 is obtained. The information of the intensity distribution of the interference pattern 79 is sent into a computer 49 after the removal of noises and the AD conversion by a pretreatment circuit 48. In the computer 49, the information is compressed in the direction perpendicular to the position detecting direction, and a one-dimensional signal is obtained. The central position xw of an aligning pattern on a wafer is obtained from the symmetry of the waveform of the signal. An aligning quantity and its direction are obtained from the position deviation from the central position xr of the aligning pattern on a reticle. A stage 4 is finely moved in the direction (x) based on the quantity and the direction. The alignment in the direction (y) is performed by the same way. When the alignment is finished, exposing light is projected from an exposure system. Thus, the circuit pattern on the reticle is printed on the chip on the wafer 3.</p>
申请公布号 JPH01230233(A) 申请公布日期 1989.09.13
申请号 JP19880054968 申请日期 1988.03.10
申请人 HITACHI LTD 发明人 NAKADA TOSHIHIKO;SHIBA MASATAKA
分类号 G03F9/00;H01L21/027;H01L21/30;H01L21/68 主分类号 G03F9/00
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