发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To obtain a high-speed logic circuit which is highly resistant to the external noise by securing a combination between the logic circuit in which the collector of the transistor Tr applying the input to the base is connected to the base of another Tr and the logic circuit consisting of the Tr featuring the non-saturation action. CONSTITUTION:Input A and B are applied to the bases of TrQ'i1 and Q'i2 each, and the collectors and connected to the base of TrQ'r, output terminal ONOR and resistance R5 as well as to the positive power source via R5. Then the collector of TrQ'r is connected to the power source via output terminal OOR43 and resistance R6, and the emitters of TrQ'i1, Q'i2 and Q'r are connected in common to each other as well as to the negative power source via constant current source 49. A logic circuit featuring the Schmitt circuit characteristics in that a sudden switching is secured for the output level after the sufficient lowering of the input level can be obtained by setting resistances R5 and R6 to the prescribed value each. The output terminal of such logic circuit is connected to the logic circuit which features the transmission characteristics of the non-threshold level and operates in the non-saturation region. As a result, a highly steady and high-speed logic circuit can be obtained regardless of the low power voltage and low amplitude and with a high degree of tolerance ensured to the external noise.
申请公布号 JPS5563132(A) 申请公布日期 1980.05.13
申请号 JP19780135834 申请日期 1978.11.06
申请人 HITACHI LTD 发明人 WATANABE YUTAKA
分类号 H03K19/086;(IPC1-7):03K19/086 主分类号 H03K19/086
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