发明名称 FILTER UNIT USING CAPACITOR ARRAY AND INTEGRAL TYPE AD CONVERTER
摘要 PURPOSE:To obtain desired filtering characteristics only by changing memory contents of a memory circuit with an arithmetic part and converter both fixed by performing general conversion of an analog signal as it is by using a capacitor array for a matrix arithmetic unit, and then by carrying out multiplication by a coefficient suitable to a purpose. CONSTITUTION:Capacitors C11-C1n have capacitors at a ratio set by making an input signal correspond to a matrix. Integrators 2 are provided corresponding to capacitors C11-C1n. Sample holding circuit 3 is provided in order to share an integral A/D converter among several capacitors and an integrator output after a (n)- series of operations is held there for a next one period. The output of this circuit is sequentially selected by switches R1-Rn and the intergral A/D converter multiplies the output by coefficients K1-Kn.
申请公布号 JPS5560324(A) 申请公布日期 1980.05.07
申请号 JP19780133134 申请日期 1978.10.31
申请人 FUJITSU LTD 发明人 TSUDA TOSHITAKA;YAMASHITA TOMOYOSHI
分类号 H03H19/00;H03M1/74 主分类号 H03H19/00
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